Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic
| Autor: | Cilio, Washington, Linder, Michael, Porter, Chris, Di, Jia, Thompson, Dale R., Smith, Scott C. |
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| Zdroj: | In Microelectronics Journal March 2013 44(3):258-269 |
| Databáze: | ScienceDirect |
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