FPGA realization of FIR filters for high-speed and medium-speed by using modified distributed arithmetic architectures
| Autor: | Xie, Jiafeng, He, Jianjun, Tan, Guanzheng |
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| Zdroj: | In Microelectronics Journal June 2010 41(6):365-370 |
| Databáze: | ScienceDirect |
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Full Text from ScienceDirect