Effects of Forming Gas Annealing and Channel Dimensions on the Electrical Characteristics of FeFETs and CMOS Inverter

Autor: Po-Jung Sung, Chun-Jung Su, Shih-Hsuan Lo, Fu-Kuo Hsueh, Darsen D. Lu, Yao-Jen Lee, Tien-Sheng Chao
Jazyk: angličtina
Rok vydání: 2020
Předmět:
Zdroj: IEEE Journal of the Electron Devices Society, Vol 8, Pp 474-480 (2020)
Druh dokumentu: article
ISSN: 2168-6734
DOI: 10.1109/JEDS.2020.2987005
Popis: In this study, ferroelectric FETs (FeFETs) and CMOS inverters are fabricated and analyzed, exhibiting 13% of 593 devices with sub-60 mV subthreshold swing (SS) at room temperature. Forming gas annealing (FGA) is found to not only enhance ferroelectricity but also significantly improve FeFET electrostatics. The experimental results indicate that FeFET with a narrow width shows weaker ferroelectric properties, and SS of sub-60 mV/dec with ID change less than two orders of magnitude. However, FeFET with a broad channel width reveals stronger ferroelectric properties, and SS of sub-60 mV/dec is over 2 orders of magnitude of Id. Finally, typical voltage transfer characteristics (VTCs) of a FeFET CMOS inverter with double sweeps at various VD from 0.6 to 2 V are demonstrated. The results show that hysteresis in a FeFET CMOS inverter could have both clockwise (CW) and counter-clockwise (CCW) loops.
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