Autor: |
S Simos, T Moschos, K Fotiadis, D Chatzitheocharis, T Alexoudi, C Vagionas, D Sacchetto, M Zervas, N Pleros |
Jazyk: |
angličtina |
Rok vydání: |
2023 |
Předmět: |
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Zdroj: |
JPhys Photonics, Vol 5, Iss 4, p 045002 (2023) |
Druh dokumentu: |
article |
ISSN: |
2515-7647 |
DOI: |
10.1088/2515-7647/acf973 |
Popis: |
In this work we experimentally demonstrate a Si _3 N _4 photonic integrated circuit which offers row decoding and RAM addressing functionalities. The passive integrated structure comprises a MRR-based wavelength filtering bank scheme in a 2 × 4 configuration, which reveals a suppression ratio in the range of 12–25 dB. The performance of the optical circuit has been evaluated in a system-level testbed, where successful addressing in one RAM row has been achieved. Error-free operation has been accomplished for all cases under study, with the whole row decoder system’s performance to offer a total power penalty of 2.5 dB. |
Databáze: |
Directory of Open Access Journals |
Externí odkaz: |
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