Formalizing Memory Accesses and Interrupts

Autor: Reto Achermann, Lukas Humbel, David Cock, Timothy Roscoe
Jazyk: angličtina
Rok vydání: 2017
Předmět:
Zdroj: Electronic Proceedings in Theoretical Computer Science, Vol 244, Iss Proc. MARS 2017, Pp 66-116 (2017)
Druh dokumentu: article
ISSN: 2075-2180
DOI: 10.4204/EPTCS.244.4
Popis: The hardware/software boundary in modern heterogeneous multicore computers is increasingly complex, and diverse across different platforms. A single memory access by a core or DMA engine traverses multiple hardware translation and caching steps, and the destination memory cell or register often appears at different physical addresses for different cores. Interrupts pass through a complex topology of interrupt controllers and remappers before delivery to one or more cores, each with specific constraints on their configurations. System software must not only correctly understand the specific hardware at hand, but also configure it appropriately at runtime. We propose a formal model of address spaces and resources in a system that allows us to express and verify invariants of the system's runtime configuration, and illustrate (and motivate) it with several real platforms we have encountered in the process of OS implementation.
Databáze: Directory of Open Access Journals