Autor: |
Han Mengqiao, Jiang Lin, Yang Bowen, Shan Rui, Geng Yurong |
Jazyk: |
čínština |
Rok vydání: |
2019 |
Předmět: |
|
Zdroj: |
Dianzi Jishu Yingyong, Vol 45, Iss 5, Pp 17-22 (2019) |
Druh dokumentu: |
article |
ISSN: |
0258-7998 |
DOI: |
10.16157/j.issn.0258-7998.182489 |
Popis: |
In order to improve the unified shading processor efficiency of the mobile graphics processor and reduce the number of accesses between it and the off-chip memory, this paper presents a four-port texture cache architecture. This architecture uses texture mapping based on Mipamp algorithm and the storage mode of different single-port cache is selected based on Level of Detail(LOD), which improves the hit rate of texture cache.In addition, in order to improve data throughput, four ports supporting 4 parallel reading are designed. FIFO buffer is designed for prefetching memory data and reducing memory latency. Using SV to build an experimental platform to test texture images,the results show that the average hit rate is about 92.5%, and the rate of data throughput is nearly 4 times that of the single port cache. |
Databáze: |
Directory of Open Access Journals |
Externí odkaz: |
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