| Popis: |
This paper provides a detailed exploration of CMOS operational amplifiers (Op-Amps) aimed at enhancing understanding of their development, design, and application. To achieve this, a comprehensive examination of the common characteristics, parameters, and bibliographic reviews of Op-Amps, distinguishing among various chosen operational amplifiers. A comprehensive bibliographic review of the operational amplifier's keywords between 2008 and 2018 has also been conducted. A bibliometric analysis of 4997 documents from the Web of Science (WOS) Collection is conducted using VOSviewer software. Furthermore, an analysis and comparison of these Op-Amps across functional aspects relevant to industrial and biomedical applications, emphasising the salient characteristics of each technique. After the survey, a novel Op-Amp design is proposed, incorporating a differential amplifier at the first stage, along with a compensating capacitor and a high gain stage. The biasing circuitry is replaced with an active load resistor (MOS transistor), simplifying layout design, and reducing the amplifier's area and power consumption compared to traditional two-stage designs. The power source for this design is 3.3 V. This designed operational amplifier achieved a gain of 62.9449 dB, a high CMRR of 92.8079 dB, and a unity gain bandwidth of 33 MHz, and the optimised layout area is 0.001476 μm2. The proposed circuit was designed and simulated utilising the Cadence Virtuoso 180 nm CMOS process. The simulation results show that the desired criteria have been met. Additionally, the challenges and future possibilities in analog circuits, laying the groundwork for research in both analogue and digital circuits to tackle complex real-world issues have been addressed. |
