| Autor: |
Hasitha Jayatilleka, Wesley D. Sacher, Joyce K. S. Poon |
| Jazyk: |
angličtina |
| Rok vydání: |
2013 |
| Předmět: |
|
| Zdroj: |
IEEE Photonics Journal, Vol 5, Iss 1, Pp 2200211-2200211 (2013) |
| Druh dokumentu: |
article |
| ISSN: |
1943-0655 |
| DOI: |
10.1109/JPHOT.2013.2240381 |
| Popis: |
We derive an analytical model for the depletion capacitance of silicon-on-insulator (SOI) optical modulation diodes. This model accurately describes the parasitic fringe capacitances due to a lateral pn junction and can be extended to other geometries, such as vertical and interdigitated junctions. The model is used to identify the waveguide slab to rib height ratio as a key geometric scaling parameter for the modulation efficiency and bandwidth for lateral diodes. The fringe capacitance is a parasitic effect that leads to a decrease of about 20% in the modulation bandwidth of typical SOI diodes without a corresponding increase in the modulation efficiency. From the scaling relations, the most effective way to increase the modulation bandwidth is to reduce the series resistance of the diode. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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