Reducing the Short Channel Effect of Transistors and Reducing the Size of Analog Circuits
Autor: | Zhaopeng Wei, Gilles Jacquemod, Yves Leduc, Emeric de Foucauld, Jerome Prouvee, Benjamin Blampey |
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Jazyk: | angličtina |
Rok vydání: | 2019 |
Předmět: | |
Zdroj: | Active and Passive Electronic Components, Vol 2019 (2019) |
Druh dokumentu: | article |
ISSN: | 0882-7516 1563-5031 |
DOI: | 10.1155/2019/4578501 |
Popis: | Analog integrated circuits never follow the Moore’s Law. This is particularly right for passive component. Due to the Short Channel Effect, we have to implement longer transistor, especially for analog cell. In this paper, we propose a new topology using some advantages of the FDSOI (Fully Depleted Silicon on Insulator) technology in order to reduce the size of analog cells. First, a current mirror was chosen to illustrate and validate a new design. Measured currents, with 35nm transistor length, have validated our new cross-coupled back-gate topology. Then, a VCRO (Voltage Controlled Ring Oscillator) based on complementary inverter is also used to remove passive components reducing the size of the circuit. |
Databáze: | Directory of Open Access Journals |
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