| Autor: |
Gao Shan, Wu Dehua, Xiao Wan’ang, Wang Zetao, Yang Zhenghong, Gao Wanlin |
| Jazyk: |
English<br />French |
| Rok vydání: |
2022 |
| Předmět: |
|
| Zdroj: |
MATEC Web of Conferences, Vol 355, p 03055 (2022) |
| Druh dokumentu: |
article |
| ISSN: |
2261-236X |
| DOI: |
10.1051/matecconf/202235503055 |
| Popis: |
An on-chip debugging method based on the RISC-V processor is introduced, which simplifies the complicated debugging operation into instructions and improves the debugging efficiency effectively. The method adopts a JTAG interface to realize the debugging functions of the processor, such as running control, software breakpoint, hardware breakpoint and single-step execution. The method was verified by simulation at the RTL level, and the logic synthesis was carried out in SMIC 180nm process library. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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