Autor: |
G. V. Luong, S. Strangio, A. T. Tiedemann, P. Bernardy, S. Trellenkamp, P. Palestri, S. Mantl, Q. T. Zhao |
Jazyk: |
angličtina |
Rok vydání: |
2018 |
Předmět: |
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Zdroj: |
IEEE Journal of the Electron Devices Society, Vol 6, Pp 1033-1040 (2018) |
Druh dokumentu: |
article |
ISSN: |
2168-6734 |
DOI: |
10.1109/JEDS.2018.2825639 |
Popis: |
A half SRAM cell with strained Si nanowire complementary tunnel-FETs (TFETs) was fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based on TFETs. Outward-faced n-TFETs are used as access-transistors. Static measurements were performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage of the access-transistor at certain bias configurations leads to malfunctioning storage operation, even without the contribution of the ambipolar behavior. At large VDD, lowering of the bit-line bias is needed to mitigate such effect, demonstrating functional hold, read and write operations. Circuit simulations were carried out using a Verilog-A compact model calibrated on the experimental TFETs, providing a better understanding of the TFET SRAM operation at different supply voltages and for different cell sizing and giving an estimate of the dynamic performance of the cell. |
Databáze: |
Directory of Open Access Journals |
Externí odkaz: |
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