| Autor: |
Jiahao Lu, Dongsheng Liu, Hao Li, Cong Zhang, Xuecheng Zou |
| Jazyk: |
angličtina |
| Rok vydání: |
2019 |
| Předmět: |
|
| Zdroj: |
IEEE Access, Vol 7, Pp 73285-73294 (2019) |
| Druh dokumentu: |
article |
| ISSN: |
2169-3536 |
| DOI: |
10.1109/ACCESS.2019.2920437 |
| Popis: |
Radio frequency identification (RFID) is widely used in various areas such as logistics, supply-chain management, and access control. The new challenge for designing an RFID tag is how to embed a low-cost and low-power consumption algorithm into a compact RFID tag chip. This paper presents a passive HF-band tag chip supporting ISO/IEC 14443 type A/B protocol with low-cost and low-power consumption. In the Analog Front End, a bridge rectifier with 73.76% power conversion efficiency is presented to accomplish RF-dc conversion. A robust demodulator with both 10% and 100% ASK demodulation capabilities and a subcarrier-based modulator are designed to complete the data transfer process. Moreover, a burr-eliminating power ON/OFF reset circuit is proposed to provide a reset signal for the system. In the digital baseband controller, a linear feedback shift register-based light-weight authentication protocol is presented to ensure data security while reducing resource overhead. The embedded 8-Kb EEPROM contains eight independent keys for eight different application fields. The tag chip is fabricated in HJ025 2P4M CMOS process with an area of 1.1mm $\times $ 1.18mm and total static power consumption of $116.45~\mu \text{W}$ . The low cost and low-power consumption ensure the tag chip, especially suitable for smart cards. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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