| Autor: |
Myunghan Bae, Byung-Soo Choi, Sang-Hwan Kim, Jimin Lee, Chang-Woo Oh, Pyung Choi, Jang-Kyoo Shin |
| Jazyk: |
angličtina |
| Rok vydání: |
2017 |
| Předmět: |
|
| Zdroj: |
Proceedings, Vol 1, Iss 4, p 338 (2017) |
| Druh dokumentu: |
article |
| ISSN: |
2504-3900 |
| DOI: |
10.3390/proceedings1040338 |
| Popis: |
We propose a linear-logarithmic CMOS image sensor with reduced fixed pattern noise (FPN). The proposed linear-logarithmic pixel based on a conventional 3-transistor active pixel sensor (APS) structure has additional circuits in which a photogate and a cascade MOSFET are integrated with the pixel structure in conjunction with the photodiode. To improve FPN, we applied the PMOSFET hard reset method as a reset transistor instead of NMOSFET reset normally used in APS. The proposed pixel has been designed and fabricated using 0.18-μm 1-poly 6-metal standard CMOS process. A 120 × 240 pixel array of test chip was divided into 2 different subsections with 60 × 240 sub-arrays, so that the proposed linear-logarithmic pixel with reduced FPN could be compared with the conventional linear-logarithmic pixel. We confirmed a reduction of pixel response variation which affected image quality. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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