| Autor: |
Faezal Siti Farhah Razanah, Md Isa Mohd Nazrin, Harun Azizi, Mohyar Shaiful Nizam, Jambek Asral Bahari |
| Jazyk: |
angličtina |
| Rok vydání: |
2017 |
| Předmět: |
|
| Zdroj: |
EPJ Web of Conferences, Vol 162, p 01071 (2017) |
| Druh dokumentu: |
article |
| ISSN: |
2100-014X |
| DOI: |
10.1051/epjconf/201716201071 |
| Popis: |
Increases in die size and power density inside system-on-chip (SoC) design have brought thermal issue inside the system. Uneven heat-up and increasing in temperature offset on-chip has become a major factor that can limits the system performance. This paper presents the design and simulation of a temperature-based digital signal processing for modern system-on-chip design using the Verilog HDL. This design yields continuous monitoring of temperature and reacts to specified conditions. The simulation of the system has been done on Altera Quartus Software v. 14. With system above, microcontroller can achieve nominal power dissipation and operation is within the temperature range due to the incorporate of an interrupt-based system. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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