Stacked SiGe nanosheets p-FET for Sub-3 nm logic applications

Autor: Chun-Lin Chu, Shu-Han Hsu, Wei-Yuan Chang, Guang-Li Luo, Szu-Hung Chen
Jazyk: angličtina
Rok vydání: 2023
Předmět:
Zdroj: Scientific Reports, Vol 13, Iss 1, Pp 1-7 (2023)
Druh dokumentu: article
ISSN: 2045-2322
DOI: 10.1038/s41598-023-36614-2
Popis: Abstract The fabrication of vertically stacked SiGe nanosheet (NS) field-effect transistors (FETs) was demonstrated in this study. The key process technologies involved in this device fabrication are low pressure chemical vapor deposition SiGe/Si multilayer epitaxy, selective etching of Si layers over SiGe layers using tetramethyl-ammonium-hydroxide wet solution, and atomic layer deposition of Y2O3 gate dielectric. For the fabricated stacked SiGe NS p-GAAFETs with a gate length of 90 nm, ION/IOFF ratio of around 5.0 × 105 and subthreshold swing of 75 mV/dec were confirmed via electrical measurements. Moreover, owing to its high quality of Y2O3 gate dielectric, the device showed a very small drain-induced barrier-lowering phenomenon. These designs can improve the gate controllability of channel and device characteristics.
Databáze: Directory of Open Access Journals
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