Autor: |
H. Das, A. A. Haidous, S. C. Smith, N. Gong |
Jazyk: |
angličtina |
Rok vydání: |
2023 |
Předmět: |
|
Zdroj: |
IEEE Access, Vol 11, Pp 57735-57744 (2023) |
Druh dokumentu: |
article |
ISSN: |
2169-3536 |
DOI: |
10.1109/ACCESS.2023.3283409 |
Popis: |
In this paper, an error-correction code (ECC)-enabled memory design with selective bit hardening is proposed for approximate data storage. Approximate memory is suitable for error-tolerant applications, and can achieve low-power design goals within targeted quality. Our design offers approximately 90% power savings compared to traditional memory, without compromising perceived quality. To the best of our knowledge, combining selective bit hardening with ECC is a novel approach to ensure the protection of MSBs and protect other faulty bits, respectively. Our proposed method requires no area overhead for MSB hardening, other than one additional input pin; and area overhead for implementing ECC is minimal. |
Databáze: |
Directory of Open Access Journals |
Externí odkaz: |
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