| Autor: |
Eisuke Anju, Iriya Muneta, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi |
| Jazyk: |
angličtina |
| Rok vydání: |
2018 |
| Předmět: |
|
| Zdroj: |
IEEE Journal of the Electron Devices Society, Vol 6, Pp 1239-1245 (2018) |
| Druh dokumentu: |
article |
| ISSN: |
2168-6734 |
| DOI: |
10.1109/JEDS.2018.2882406 |
| Popis: |
In this paper, we investigated the source/drain recessed contact structure to mitigate the self-heating-effects in vertically stacked-nanowire FETs. As a result, lattice temperature of nanowire regions during device operation was considerably decreased by using the source/drain recessed contact structure. This is attributed to an increase in heat dissipation mainly from heat source to bulk wafer. Moreover, we proposed the p/n-stacked nanowire on bulk FinFET and its 6T-SRAM layout. Area of the proposed SRAM was reduced approximately 15%, as compared to the conventional cell layout. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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