| Autor: |
Pantea Kiaei, Patrick Schaumont |
| Jazyk: |
angličtina |
| Rok vydání: |
2022 |
| Předmět: |
|
| Zdroj: |
Transactions on Cryptographic Hardware and Embedded Systems, Vol 2022, Iss 4 (2022) |
| Druh dokumentu: |
article |
| ISSN: |
2569-2925 |
| DOI: |
10.46586/tches.v2022.i4.751-773 |
| Popis: |
Finding the root cause of power-based side-channel leakage becomes harder when multiple layers of design abstraction are involved. While side-channel leakage originates in processor hardware, the dangerous consequences may only become apparent in the cryptographic software that runs on the processor. This contribution presents RootCanal, a methodology to explain the origin of side-channel leakage in a software program in terms of the underlying micro-architecture and system architecture. We simulate the hardware power consumption at the gate level and perform a non-specific test to identify the logic gates that contribute most sidechannel leakage. Then, we back-annotate those findings to the related activities in the software. The resulting analysis can automatically point out non-trivial causes of side-channel leakages. To illustrate RootCanal’s capabilities, we discuss a collection of case studies. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
|
