Hypervisor Extension for a RISC-V Processor
Autor: | Gauchola, Jaume, Costa, JuanJosé, Morancho, Enric, Canal, Ramon, Carril, Xavier, Doblas, Max, Otero, Beatriz, Pajuelo, Alex, Rodríguez, Eva, Salamero, Javier, Verdú, Javier |
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Rok vydání: | 2024 |
Předmět: | |
Druh dokumentu: | Working Paper |
Popis: | This paper describes our experience implementing a Hypervisor extension for a 64-bit RISC-V processor. We describe the design process and the main required parts with a brief explanation of each one. Comment: RISC-V Summit Europe 2023, June 5-9, 2023 |
Databáze: | arXiv |
Externí odkaz: |