Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators

Autor:	Cai, Jingwei, Wu, Zuotong, Peng, Sen, Wei, Yuchen, Tan, Zhanhong, Shi, Guiming, Gao, Mingyu, Ma, Kaisheng
Rok vydání:	2023
Předmět:	Computer Science - Hardware Architecture
Druh dokumentu:	Working Paper
Popis:	Chiplet technology enables the integration of an increasing number of transistors on a single accelerator with higher yield in the post-Moore era, addressing the immense computational demands arising from rapid AI advancements. However, it also introduces more expensive packaging costs and costly Die-to-Die (D2D) interfaces, which require more area, consume higher power, and offer lower bandwidth than on-chip interconnects. Maximizing the benefits and minimizing the drawbacks of chiplet technology is crucial for developing large-scale DNN chiplet accelerators, which poses challenges to both architecture and mapping. Despite its importance in the post-Moore era, methods to address these challenges remain scarce. Comment: Accepted by 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
Databáze:	arXiv
Externí odkaz:	http://arxiv.org/abs/2312.16436 Zobrazit plný text záznamu View this record from Arxiv