| Autor: |
Cılasun, Hüsrev, Zeng, Ziqing, S, Ramprasath, Kumar, Abhimanyu, Lo, Hao, Cho, William, Kim, Chris H., Karpuzcu, Ulya R., Sapatnekar, Sachin S. |
| Rok vydání: |
2023 |
| Předmět: |
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| Druh dokumentu: |
Working Paper |
| Popis: |
This work solves 3SAT, a classical NP-complete problem, on a CMOS-based Ising hardware chip with all-to-all connectivity. The paper addresses practical issues in going from algorithms to hardware. It considers several degrees of freedom in mapping the 3SAT problem to the chip - using multiple Ising formulations for 3SAT; exploring multiple strategies for decomposing large problems into subproblems that can be accommodated on the Ising chip; and executing a sequence of these subproblems on CMOS hardware to obtain the solution to the larger problem. These are evaluated within a software framework, and the results are used to identify the most promising formulations and decomposition techniques. These best approaches are then mapped to the all-to-all hardware, and the performance of 3SAT is evaluated on the chip. Experimental data shows that the deployed decomposition and mapping strategies impact SAT solution quality: without our methods, the CMOS hardware cannot achieve 3SAT solutions on SATLIB benchmarks. |
| Databáze: |
arXiv |
| Externí odkaz: |
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