Evaluating Asymmetric Multicore Systems-on-Chip using Iso-Metrics

Autor:	Chalios, Charalampos, Nikolopoulos, Dimitrios S., Quintana-Orti, Enrique S.
Rok vydání:	2015
Předmět:	Computer Science - Distributed Parallel and Cluster Computing Computer Science - Hardware Architecture C.1.3 G.4
Druh dokumentu:	Working Paper
Popis:	The end of Dennard scaling has pushed power consumption into a first order concern for current systems, on par with performance. As a result, near-threshold voltage computing (NTVC) has been proposed as a potential means to tackle the limited cooling capacity of CMOS technology. Hardware operating in NTV consumes significantly less power, at the cost of lower frequency, and thus reduced performance, as well as increased error rates. In this paper, we investigate if a low-power systems-on-chip, consisting of ARM's asymmetric big.LITTLE technology, can be an alternative to conventional high performance multicore processors in terms of power/energy in an unreliable scenario. For our study, we use the Conjugate Gradient solver, an algorithm representative of the computations performed by a large range of scientific and engineering codes. Comment: Presented at HiPEAC EEHCO '15, 6 pages
Databáze:	arXiv
Externí odkaz:	http://arxiv.org/abs/1503.08104 Zobrazit plný text záznamu View this record from Arxiv