Hardware Implementation of Algorithm for Cryptanalysis

Autor:	Zodpe, Harshali, Wani, Prakash, Mehta, Rakesh
Rok vydání:	2013
Předmět:	Computer Science - Cryptography and Security Computer Science - Hardware Architecture
Zdroj:	International Journal on Cryptography and Information Security (IJCIS), Vol.3, No.1, March 2013
Druh dokumentu:	Working Paper
DOI:	10.5121/ijcis.2013.3102
Popis:	Cryptanalysis of block ciphers involves massive computations which are independent of each other and can be instantiated simultaneously so that the solution space is explored at a faster rate. With the advent of low cost Field Programmable Gate Arrays, building special purpose hardware for computationally intensive applications has now become possible. For this the Data Encryption Standard is used as a proof of concept. This paper presents the design for Hardware implementation of DES cryptanalysis on FPGA using exhaustive key search. Two architectures viz. Rolled and Unrolled DES architecture are compared and based on experimental result the Rolled architecture is implemented on FPGA. The aim of this work is to make cryptanalysis faster and better. Comment: 9 pages, 7 figures
Databáze:	arXiv
Externí odkaz:	http://arxiv.org/abs/1304.6672 Zobrazit plný text záznamu View this record from Arxiv