Simulations of gated Si nanowires and 3-nm junctionless transistors

Autor: Ansari, Lida, Feldman, Baruch, Fagas, Giorgos, Colinge, Jean-Pierre, Greer, James C.
Rok vydání: 2010
Předmět:
Zdroj: Appl. Phys. Lett. 97, 062105 (2010)
Druh dokumentu: Working Paper
DOI: 10.1063/1.3478012
Popis: Inspired by recent experimental realizations and theoretical simulations of thin silicon nanowire-based devices, we perform predictive first-principles simulations of junctionless gated Si nanowire transistors. Our primary predictions are that Si-based transistors are physically possible without major changes in design philosophy at scales of ~1 nm wire diameter and ~3 nm gate length, and that the junctionless transistor may be the only physically sensible design at these length scales. We also present investigations into atomic-level design factors such as dopant positioning and concentration.
Databáze: arXiv