Ultra low power full adder topologies
Autor: | Moradi, Farshad, Wisland, Dag T., Mahmoodi, Hamid, Aunet, Snorre, Tuan Vu, Cao |
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Jazyk: | angličtina |
Rok vydání: | 2009 |
Předmět: | |
Zdroj: | Moradi, F, Wisland, D T, Mahmoodi, H, Aunet, S & Tuan Vu, C 2009, ' Ultra low power full adder topologies ', Paper presented at Internation symposium on circuits and systems, Taipei, Taiwan, 24/05/2009-27/05/2009 . < http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5118473 > |
Popis: | In this paper several low power full adder topologies are presented. The main idea of these circuits is based on the sense energy recovery full adder (SERF) design and the GDI (gate diffusion input) technique. These subthreshold circuits are employed for ultra low power applications. While the proposed circuits have some area overhead that is negligible, they have at least 62% less power dissipation when compared with existing designs. In this paper, 65 nm standard models are used for simulations. |
Databáze: | OpenAIRE |
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