| Popis: |
ÖZET Bu çalışmada, MOS kapasitelerin C-V eğrilerinin çıkartılmasında kullanılan ve üreteceği işaretin karakteristik verileri doğru ve hassas olarak programlanabilen, özel tipte bir işaret üreteci tasarlanmış ve gerçekleştirilmiştir. Tasarlanan cihazın üzerinde bulunan tuş takımından istenen tipteki bir işaretin karakteristik değerleri girilirken, yine cihaz üzerinde bulunan bir likid kristal göstergeden girilen değer kullanıcıya gösterilecektir. Yanlış veri girilmesi durumunda ise veri iptal edilip yerine doğrusu girilebilecektir. Üretilecek işaretin tüm karakteristik özellikleri girildikten sonra, işaretin üretilmeye başlanması için ya bilgisayardan başla komutunun gelmesi, ya da cihaz üzerindeki başla tuşuna basılması gerekmektedir. Başlama komutu, gerek cihaz üzerindeki tuş takımından, gerekse cihazın seri yoldan bağlı bulunacağı bir kişisel bilgisayardan gelsin, cihaz işareti, verilen değerlere göre üretirken bir yandan da ürettiği işaretten örneklediği gerilim değerlerini seri kanal üzerinden bilgisayara gönderecektir. Bu sırada bilgisayarda cihaz ile seri haberleşmeyi sağlayan ve alınan verileri ekrana gönderebilecek bir program koşacaktır. Cihaz, ürettiği işarete ilişkin gerilim değerlerini kendi üstünde bulunan göstergeden de kullanıcıya gösterecektir. Üretilen işaretin periyodik olup olmaması kullanıcıya bağlı olacaktır. İşaret periyodik olarak seçilmişse, işaret üretimi bir peryod için tamamlandığında cihaz aynı işareti baştan üretmeye başlayacak, işaret periyodik seçilmemiş ise, cihaz işaret üretimini tamamladıktan sonra çıkış uçlarım beslediği devreden yalıtacak ve kullanıcıdan gelecek ikinci bir veri girişine dek bekleyecektir. -iv- SUMMARY In this thesis, a special function generator that is used for obtaining C- V characteristics of a MOS capacitor and has an accurate output signal, has been designed and implemented. Function generators have a wide range of applications in communications, bioengineering, mechanical and chemical studies and process control. The basic function generator is a device that generates a stable, well- defined periodic output signal that may be controlled externally. A typical function generator consists of three sections;. An oscillator that generates a periodic wave form. A wave shaper that converts the output of the oscillator into desired wave form.. An output buffer amplifier to enable the generator to drive the required load. The general performance characteristics of a function generator are determined by the performance of each section included by the systems. The oscillator determines the stability and linearity of signal that will be produced. Generally, microcomputer controlled function generators are implemented in two ways; In the first method, signals are generated by means of microcomputer. Not only for standard wave forms (sine wave, triangular wave, square wave, trapeze and pulse) but also for special signals, look-up tables are commonly used. In this method, look-up tables are constituted in EPROM that is addressed by a counter. The counter clock that defines signal frequency, is derived from a separate clock generator. The clock is the core element of the generator, since its performance directly effects the output signal wave form. It must ensure good frequency stability and be easily programmable by the controller. The clock is based on a phase locked loop. -v-In the second method, function generators are implemented with discrete elements that can be controlled by any controller. At high frequencies and for only standard wave forms, this method is obviously easier to implement and more cost-effective. But in many applications that are required low frequencies and special signals, this method may be impossible to use. In this situation, it is better to use the first method. As has been mentioned before, in this thesis, a special signal generator that is controlled by a micro controller, has been designed and implemented by using the first method basically to implement a function generator. The basic buildings of the system are micro controller management unit, analog to digital converter (ADC), digital to analog converter (DAC), keyboard, liquid crystal display (LCD) and serial line connection unit (RS232) with a personal computer. The micro controller system that controls all the system is designed around an 80C32 micro controller. Micro controller management units consist of 80C32 micro controller, 27C256 32K*8 Bits EPROM, 62256 32K*8 Bits Static RAM, addressing logic, LCD display and keyboard. The EPROM can be chosen as 27C64 8K*8 Bits EPROM and Static RAM can also be chosen as 6264 8K*8 Bits RAM by changing positions corresponding jumpers on the board. This is up to user. The 80C32 micro controller is a member of MCS-51 Micro controller family. The features of the 80C32 are:. 8 - bit CPU optimized for control applications. Extensive Boolean processing (single bit logic) capabilities. 64K Program Memory address space. 64K Data Memory address space. 256 Bytes of on-chip Data RAM. 32 bi-directional and individually addressable I/O lines. Three 16-Bit programmable timer/counters. Full duplex UART. On-chin clock oscillator -VI-All MCS-51 devices have separate address spaces for Program and Data Memory. The logical separation of Program and Data Memory allows the Data. Memory to be accessed 8 bit addresses, which can be more quickly stored and manipulated by an 8 bit CPU. Nevertheless, 16 bit Data Memory addresses can also be generated through the DPTR register. Program Memory can only be read, not written to. There can be up to 64K bytes of Program Memory. In the ROM and EPROM versions of these devices 4K, 8K or 16K bytes of Program Memory are provided on-chip. In the romless versions all Program Memory is external. The read strobe for external Program Memory is the signal PSEN (Program Strobe Enable). Data Memory occupies a separate address space from Program Memory. Up to 64K bytes of external RAM can be addressed in external Data Memory Space. The CPU generates read and write signals, RD and WR, as needed during external Data Memory accesses. External Data Memory and external Program Memory can be combined if desired by applying the RD and PSEN signals to the inputs af an AND gate and using the output of this gate as the read strobe to the external Program Memory or Data Memory. In this thesis 27C256 32K*8 Bits or 27C64 8K*8 Bits EPROM can be chosen as the Program Memory and 62256 32K*8 Bits or 6264 8K*8 Bits RAM can also be selected by changing jumper positions on board as the Data Memory. The external memories (both Program and Data Memory) are described below:. Program Memory The Program Memory Addresses depends on which kind of EPROM has been selected. -0000H-7FFFH If 32K*8 Bits EPROM is selected. - 0000H- 1 FFFH If 8K*8 Bits EPROM is selected In addition to this, The output of an AND gate that PSEN and RD signals are applied its inputs, is used as external RAM read signal. For this reason accessing both Program and Data Memory in the addresses between 8000H to OFFFFH are just the same. Another words, there is an address overlapping between Program Memory and Data Memory in the upper 32K Bytes of each address space. -VII-. Data Memory In the lower 32K Bytes of Data Memory, some external I/O devices are addressed by the decoder. One of the logic 0 active enable input of decoder is connected to A15 directly. For this reason decoder can address devices that their addresses below 7FFFH. Other logic 0 active enable input of decoder is connected to signal PSEN that's why decoder will never cause any address corruption between Program and Data Memory in the lower 32K bytes of each address space. The logic 1 active enable input is connected to an AND gate output that RD and WR signals of the controller have been applied to its inputs. In this way, it will be possible to both write and read accesses to the lower 32K Bvtes of the Data Memorv. Corresponding addresses to each I/O devices are given below: 0000H-0FFFH: Only write accesses should be done to these addresses. A writes access to these addresses will enable the CS of the input FLIP-FLOP of 8-Bits DAC(DAC08). 1000H-1FFFH: A write or read access to these addresses will enable the LCD to an operation that is determined by Aq and Ax connected to RS and R/W pins of LCD respectively. The operations that are determined by the lowest significant address bits are; 2000F-2FFFH: A write access to this addresses will indicate that, CPU sends a message to 10 Bits ADC in order to begin to convert voltage applied its input from analog to digital. A read accesses while A^l will enable the CPU to read high byte of converted digital word from ADC. Read accesses -VIII-txm+Vi A =A tim 11 onoKîo +V10 f^TN T +rv raarl 1/vrer 1-vtrfo rvF` />rw`»Tr£*r+a.r1 /ı-trvitol Tir/vtvl VV XU.X -Tİu> W VV XXI WXaUiW LXXV^ W A W ,V I V^UU XV/ YV L/ jf LW VI WV/XX V WX LWVJ. taXgXLttX W VJX V* from ADC, 3000H-3FFFH: Unused 4000H-4FFFH: Write accesses should be done to these addresses. Write accesses to these addresses will cause low or high byte that is applied to 12 Bits D AC inputs, to latch into the D AC. Which byte will be latched into the DAC depends on / address bit 5000H-5FFFH: Write accesses should be done to these addresses. Write accesses to these addresses will cause the 12 Bits data that is available in the input latches of DAC to transfer to the DAC register.This has the same meaning with converting 12 Bits data to analog signal. 6000H-6FFFH: Unused 7000H-7FFFH: Unused The upper 32K Bytes of Program and Data Memory are overlapped. Using anded PSEN and RD signals of controller as a read strobe of Data Memory causes this overlapping. The only difference is A15 address bit. When A15=0 EPROM (Data Memory) will be enabled otherwise both RAM(Data Memory) and EPROM(Program Memory) will be enabled. For this reason, size of EPROM(Program Memory) can not exceed 32K Bytes as well as RAM (Data Memory) without any mirror address. The Data Memory Addresses depends on which kind of RAM has been selected in this board; -8000H-0FFFFH If 32K*8 Bits RAM is selected. - 8000H- 1FFFH If 8K*8 Bits RAM is selected Keyboard is connected to Portl of 80C32. Scanning of keyboard is performed by shifting 0 in the upper nibble of PI and observing whether any kev pushed or not. This is done for all uooer nibble bits that are connected to Y -IX-axis of keyboard. The lower nibble bits are connected to X axis of keyboard. While observing the lower nibble to determine whether any key was pressed or not, if the lower nibble has the different value from OFH then it is too easy to determine which key was pressed by using a small look-up table. The RS232 converters are used in order to communicate with any PC. To perform communication with PC, serial control register is programmed in the Mod 1. Mod 1 has a variable baud rate, a start and a stop bit. A program should be written in C. Language to perform serial connection with 80C32. Finallv. each lo^ie devices have a lOOnF between their Vec and GND to prevent devices from any noise in the power supply. ıııe Key point to implement a lunction generator witn tnis naraware is incrementing DAC inputs with the timer interrupts. In addition to this DAC output must be filtered. The resolution of DAC will effect the linearity and distortion of analog output signal. Incrementing DAC's input with less timer interrupt period, will provide an output signal that has a higher slew-rate(SR). In other word, as the timer interrupt period increases, SR of the output signal will decrease. Characteristics of output signal can be changed according to requirements. Furthermore, by changing firmware (MCS-51 Assembler Program), it is too easy to produce different shape of signals. In order to make function generator that it is designed and implemented in this thesis, user-friendly, a liquid crystal display (LCD) was added to device. It will show the entries that users entered and give some messages to the user what he should do. While producing required signals LCD will show the values of voltage levels of output signal and also will send these values to the personal computer All firmware will be written into MCS-5 1 Macro Assembler Language. For emulating written programs this board can also be used because the upper 32K Bytes of Program Memory is overlapped with Data Memory. It is enough -A.-to change starting addresses of programs and compiling according to these addresses. After Droducine hex file in Intel-Intellec format Bv using Monitor EPROM placed into the board and a serial connection program running in PC, this hex file can be translated from PC to Data Memory (RAM). Because of overlapping, once you get the program to begin at least 8100H address this program runs as it runs in Program Memory (EPROM). -XI- 36 |
