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Vsak laboratorij, ki dela z elektroniko, potrebuje veliko različne testne opreme. Eden izmed najpomembnejših kosov te testne opreme je funkcijski generator. To je naprava, zmožna generiranja signalov različnih frekvenc, amplitud, oblik in modulacij. Cilj te magistrske naloge je bil narediti funkcijski generator v vezju FPGA (angl. Field Programmable Gate Array), ki deluje po principu DDS (angl. Direct Digital Synthesis). Ta princip uporablja popolnoma digitalno generiranje frekvence in omogoča zvezne ter hitre prehode med frekvencami. Za generiranje sinusnega signala izračuna ustrezno fazo in naloži primerno vrednost iz vpogledne tabele predhodno izračunanih vrednosti. Opis tega vezja je izveden v jeziku VHDL (angl. Very High Speed Integrated Circuit Hardware Description Language). Poleg tega je bilo potrebno narediti še vezje za analogno obdelavo, ki pretvori signal iz digitalne v analogno obliko, ga obdelalo z rekonstrukcijskim sitom in ojačilo dovolj, da lahko generator poganja nizkoohmsko breme. Ko je bilo digitalno in analogno vezje dokončano, je bilo potrebno še izmeriti, kako dober signal dobimo na izhodu in ga analizirati s pomočjo programskega paketa MATLAB. Za določitev kvalitete signala smo uporabili parametre SFDR (angl. Spurious-Free Dynamic Range), THD (angl. Total Harmonic Distortion) in SNR (angl. Signal to Noise Ratio), ki smo jih dobili s pomočjo transformacije FFT (angl. Fast Fourier Transform). Za referenco smo ta generator primerjali še s komercialnim produktom proizvajalca Hameg. Every electronics laboratory needs a lot of test equipment. One of the most important pieces of such equipment is a function generator. That is a device capable of generating signals of various frequencies, amplitudes, shapes and modulations. The goal of this master's thesis was to make a function generator in a FPGA (Field Programmable Gate Array) circuit, that works on the DDS (Direct Digital Synthesis) principle. This principle uses completely digital frequency generation and enables continuous and quick frequency hopping. To generate a sine wave it calculates the current phase and loads an appropriate value from a look-up table. The description of this circuit is done in VHDL (Very High Speed Integrated Circuit Hardware Description Language). We also had to make an analog processing circuit, which converted the signal from digital to analog form, processed it with a reconstruction filter and amplified it enough for the device to be able to drive a low-ohmic load. When both the digital and analog circuits were finished, we also had to measure the quality of the signal on the circuit outputs and analyse it in MATLAB. To determine the quality of the signal, we used parameters SFDR (Spurious-Free Dynamic Range), THD (Total Harmonic Distortion) and SNR (Signal to Noise Ratio), which we got from a FFT transformation (Fast Fourier Transform). |
