Genetic spot optimization for peak power estimation in large VLSI circuits

Autor:	Hsiao, Michael S.
Přispěvatelé:	Electrical and Computer Engineering
Jazyk:	angličtina
Rok vydání:	2001
Předmět:	Engineering electrical Sequential-circuits Non-zero delay Hardware_INTEGRATEDCIRCUITS Peak power Power estimation Hardware_PERFORMANCEANDRELIABILITY Computer science hardware & architecture Genetic optimization Hardware_LOGICDESIGN Low-power design Switching activity
Popis:	Estimating peak power involves optimization of the circuit's switching function. The switching of a given gate is not only dependent on the output capacitance of the node, but also heavily dependent on the gate delays in the circuit, since multiple switching events can result from uneven circuit delay paths in the circuit. Genetic spot expansion and optimization are proposed in this paper to estimate tight peak power bounds for large sequential circuits. The optimization spot shifts and expands dynamically based on the maximum power potential (MPP) of the nodes under optimization. Four genetic spot optimization heuristics are studied for sequential circuits. Experimental results showed an average of 70.7% tighter peak power bounds for large sequential benchmark circuits was achieved in short execution times. Published version
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=od______2485::e45f0c88ea1f82fef18093924bb7fa5f https://hdl.handle.net/10919/48920 Zobrazit plný text záznamu