| Autor: |
Lai, P. H. (Phuong H.), Hoang, M. (Manh), Tran, V. Q. (Viet Q.), Nguyen, T. V. (Tung V.), Truong, T. V. (Thien V.), Nguyen, P. H. (Phong H.) |
| Jazyk: |
angličtina |
| Rok vydání: |
2020 |
| Předmět: |
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| Popis: |
This paper will study a novel system on chip (SoC) design for fast Fourier transform (FFT) module. We first explain the role and position of FFT module in a digital intelligent system. Then, the discrete Fourier transform (DFT) and decimation in frequency (DIF) Radix-2 butterfly FFT algorithm is explained in detail, mathematically. In addition, the analysis of a simple pipeline FFT processor and a single-path delay feedback pipeline FFT processor based on SDF Radix-2 algorithm are discussed. Finally, the implementation and verification of proposed FFT processor are performed VERILOG hardware description language (HDL). |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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