Autor:	Chouliaras, V. A. Manolopoulos, K. Reisis, D.
Jazyk:	angličtina
Rok vydání:	2009
Popis:	The efficiency of Fused Multiply Add units plays a key role in the processor’s performance for a variety of applications. A design keeping the advantages of the FMA regarding the latency and the hardware utilization and also improving the result’s accuracy in both normalized and denormalized numbers is the subject of this work. The FMA unit has configurable latency and it is integrated in a VLIW processor. The VLSI TSMC 0.13 implementation achieved an operating frequency of 232.6 MHz and a final post-routed area of 121900.478 um(2).
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=od______2127::3229962cf106500ee760fcff5073b25b https://pergamos.lib.uoa.gr/uoa/dl/object/uoadl:3141067 Zobrazit plný text záznamu