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The scaling of solid state memory demands an ever continuing progress in memory device concepts as well as utilization of materials with properties superior to the state of the art. Since its invention dynamic random access memory (DRAM) is one of the driving forces for the technological advance in microelectronics. However, the charge-based storage of information necessitates one large capacitor in each memory cell, posing drawbacks for further scaling. Requiring constant capacitance with decreasing capacitor area, the thickness of the dielectric has been reduced to the physical limit of only few nanometers. The utilization of high permittivity dielectrics has turned out to be the sole answer to this problem. The ongoing shrinkage of the feature size and the implicated increase of the capacitor’s aspect ratio will, however, denote a scaling limit for DRAM in the near future. As a possible successor of DRAM, but also of flash memory, redox-based resistive random access memory (ReRAM) has drawn great attention. Relying on a highly local resistive switching effect, ReRAM has the opportunity to be arranged in crossbar devices of dimensions in the low nanometer regime. However, the underlying switching mechanisms are not fully understood, requiring reliable and reproducible ReRAM memory cells for the verification of simulated and modeled switching characteristics. In this thesis high permittivity capacitors for application in DRAM as well as resistive switching devices for application in ReRAM are fabricated and characterized. To meet the highly challenging preparation and electrical characterization, both a sputter tool, optimized for ultra thin film deposition, as well as sophisticated electrical characterization techniques are developed and constructed. The memory cells are prepared using a layer by layer deposition of electrode and functional oxide films on silicon substrates. In case of capacitors for DRAM application, high permittivity strontium titanate (STO) thin films are deposited on strontium ruthenate (SRO) electrodes at elevated temperature. Capacitance equivalent thickness (CET) and leakage current are superior to the best thin film devices reported in literature with STO film thickness below 15 nm. Frequently discussed passive layers in high permittivity dielectrics are shown to be insignificant in the fabricated capacitors. The analysis of leakage mechanisms reveals a detrimental Schottky barrier reduction with decreasing film thickness. This effect leads to a tremendous increase of leakage current. The comparison of the two different material systems STO and tantalum oxide with respect to their resistive switching properties and performance is the approach for the analysis of ReRAM memory cell characteristics. The investigation of the electroforming process reveals thermal activation, a considerable relation to defect density and significant switching oxide thickness dependence. With repetitive cycling, the highly reliable switching and outstanding endurance of tantalum oxide films is demonstrated. The systematic exchange of the electrode metals exhibits a distinct electrode material dependence of resistive switching. |
