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A key requirement for the increased reliability, range and throughput of the wireless communications is the ability to synchronize in a low signal-to-noise ratio (SNR) environment. It is particularly important in multiple- input and multiple-output (MIMO) communications, where a separate synchronization needs to be performed for each transmit-receive antenna pair. Moreover, the SNR for synchronization in MIMO communications is generally lower than in the single-input and single-output (SISO) case, since the transmit power is distributed amongst the multiple transmit antennas for a fixed total transmit power. Thus, the synchronization is a potential bottleneck for performance improvements in future wireless communications. This dissertation presents a synchronization architecture for packet-based MIMO communications. Specifically, it describes a direct- sequence spread-spectrum (DSSS) based synchronization system for improving the synchronization performance at low SNR, utilizing a parallel code acquisition scheme. This dissertation presents the performance analysis for the packet-based SISO communications as well as for the pilot and packet-based MIMO communications. It proposes a staggered transmission strategy for the parallel code acquisition in systems with multiple transmitter antennas, and also presents the proof for its optimality. Furthermore, it describes an architecture for the parallel code acquisition and presents the implementation of the SISO acquisition system (which is a basic building block for the MIMO acquisition system) on a radio prototype. Finally, it reports the experimental results that confirm the reliable operation at low SNR. The parallel code acquisition forms the backbone of the proposed MIMO synchronization system. This dissertation presents the performance analysis for the SISO synchronization system (which is a basic building block for the MIMO synchronization system) and describes its implementation on a radio prototype. Digital and RF tests verify the accurate translation of the synchronization system into hardware. Calibrations in the lab and experiments conducted at outdoor test sites confirm the ability to synchronize at low SNR |