| Autor: |
El Ghouli, Salim, Rideau, Denis, Monsieur, Frederic, Scheer, Patrick, Gouget, Gilles, Juge, Andre, Poiroux, Thierry, Sallese, Jean-Michel, Lallement, Christophe |
| Předmět: |
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| Popis: |
Transconductance efficiency (g(m)/I-D) is an essential design synthesis tool for low-power analog and RF applications. In this paper, the invariance of g(m)/I-D versus normalized drain current curve is analyzed in an asymmetric double-gate (DG) fully depleted MOSFET. This paper studies the breakdown of this invariance versus back-gate voltage, transistor length, temperature, drain-to-source voltage, and process variations. The unforeseeable invariance is emphasized by measurements of a commercial 28-nm ultra-thin body and box fully depleted Silicon-on-Insulator (SOI) (FDSOI) CMOS technology, thus supporting the g(m)/I-D-based design methodologies usage in DG FDSOI transistors sizing. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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