A 0.13um CMOS technology for low-voltage analogue applications
| Autor: | Ponomarev, Y.V., Stolk, P.A., van Brandenburg, A., Dachs, C.J.J., Kaiser, M., Montree, A.H., Roes, R., Schmitz, J., Woerlee, P.H., Mertens, R.P., Grünbacher, H., Maes, H.E., Declerck, G. |
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| Jazyk: | angličtina |
| Rok vydání: | 1999 |
| Předmět: | |
| Zdroj: | ESSDERC 1999: Proceedings of the 29th European solid-state device research conference, Leuven, Belgium, 13-15 september, 180-183 STARTPAGE=180;ENDPAGE=183;TITLE=ESSDERC 1999 |
| Popis: | Recent demand for battery-operated high-performance electronic products has stimulated a considerable effort towards the development of ultra low-voltage CMOS. We present here a novel approach based on an advanced lateral profiling technique coupled to gate work/unction engineering and show that this technology can rival the best SOI-based devices in speed (a record ring oscillator delay of 55ps at 0.45V supply voltage is measured). The performance of these devices for analogue applications is evaluated in detail to illustrate that the technology satisfy the analogue circuitry requirements, especially with the use of asymmetric source/drain configuration. |
| Databáze: | OpenAIRE |
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