Technology Scaling And Low Power Design Techniques

Autor: Esther Rani, T., Rao, Rameshwar, Asha Rani, M.
Jazyk: angličtina
Rok vydání: 2019
Zdroj: CVR Journal of Science and Technology; Vol 2 (2012): CVR Journal of Science and Technology; 30-39
ISSN: 2381-3652
2581-7957
2277-3916
Popis: Scaling the feature size of transistor made aremarkable advancement in silicon industry. The demandfor power-sensitive design has grown significantly in recentyears due to growth in portable applications. The need forpower-efficient design techniques is increasing. Variousefficient design techniques have been proposed to reduceboth dynamic as well as static power in state-of-the-artVLSI applications. In this paper, different circuit designtechniques both static and dynamic are discussed thatreduce the power consumption.
Databáze: OpenAIRE
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