A Reconfigurable Analog Baseband Circuitry for LFMCW RADAR Receivers in 130-nm SiGe BiCMOS Process
| Autor: | Jiang Yu, Guiliang Guo, Jing-Yu Han, Xu Cheng |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
Variable-gain amplifier
Computer Networks and Communications Computer science Low-pass filter Bandwidth extension lcsh:TK7800-8360 02 engineering and technology Hardware_PERFORMANCEANDRELIABILITY Noise figure law.invention law 0202 electrical engineering electronic engineering information engineering Electronic engineering Hardware_INTEGRATEDCIRCUITS Automatic gain control DAC Electrical and Electronic Engineering linear-in-dB Gm-C filter LFMCW SiGe BiCMOS Amplifier PGA 020208 electrical & electronic engineering Bandwidth (signal processing) lcsh:Electronics Buffer amplifier Linearity analog baseband Chip DCOC 020202 computer hardware & architecture Capacitor Filter design Hardware and Architecture Control and Systems Engineering Signal Processing Baseband Continuous wave DC bias |
| Zdroj: | Electronics, Vol 9, Iss 831, p 831 (2020) Electronics Volume 9 Issue 5 |
| ISSN: | 2079-9292 |
| Popis: | A highly reconfigurable open-loop analog baseband circuitry with programmable gain, bandwidth and filter order are proposed for integrated linear frequency modulated continuous wave (LFMCW) radar receivers in this paper. This analog baseband chain allocates noise, gain and channel selection specifications to different stages, for the sake of noise and linearity tradeoffs, by introducing a multi-stage open-loop cascaded amplifier/filter topology. The topology includes a course gain tuning pre-amplifier, a folded Gilbert variable gain amplifier (VGA) with a symmetrical dB-linear voltage generator and a 10-bit R-2R DAC for fine gain tuning, a level shifter, a programmable Gm-C low pass filter, a DC offset cancellation circuit, two fixed gain amplifiers with bandwidth extension and a novel buffer amplifier with active peaking for testing purposes. The noise figure is reduced with the help of a low noise pre-amplifier stage, while the linearity is enhanced with a power-efficient buffer and a novel high linearity Gm-C filter. Specifically, the Gm-C filter improves its linearity specification with no increase in power consumption, thanks to an alteration of the trans-conductor/capacitor connection style, instead of pursuing high linearity but power-hungry class-AB trans-conductors. In addition, the logarithmic bandwidth tuning technique is adopted for capacitor array size minimization. The linear-in-dB and DAC gain control topology facilitates the analog baseband gain tuning accuracy and stability, which also provides an efficient access to digital baseband automatic gain control. The analog baseband chip is fabricated using 130-nm SiGe BiCMOS technology. With a power consumption of 5.9~8.8 mW, the implemented circuit achieves a tunable gain range of &minus 30~27 dB (DAC linear gain step guaranteed), a programmable &minus 3 dB bandwidth of 18/19/20/21/22/23/24/25 MHz, a filter order of 3/6 and a gain resolution of better than 0.07 dB. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|