Highly parallel GPU accelerator for HEVC transform and quantization
| Autor: | Mate Cobrnic, Mario Kovač, Leon Dragić, Igor Piljić, Alen Duspara |
|---|---|
| Přispěvatelé: | Su, Ruidan, Ruidan, Su |
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
Speedup
Computational complexity theory Computer science Integer discrete cosine transform (DCT) High efficiency video coding (HEVC) Graphics processor unit (GPU) Matrix multiplication Compute unified device architecture (CUDA) High performance computing (HPC) 020206 networking & telecommunications Symmetric multiprocessor system 02 engineering and technology Internet traffic Video processing TECHNICAL SCIENCES. Computing. Architecture of Computer Systems TEHNIČKE ZNANOSTI. Računarstvo. Arhitektura računalnih sustava Computational science Shared memory Integer discrete cosine transform (DCT) high efficiency video coding (HEVC) graphics processor unit (GPU) matrix multiplication compute unified device architecture (CUDA) high performance computing (HPC) 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Quantization (image processing) Internet video |
| Zdroj: | Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence Volume 11584 2020 International Conference on Image, Video Processing and Artificial Intelligence |
| ISSN: | 1996-756X |
| Popis: | When analysing Internet traffic today it can be found that digital video content prevails. Its domination will continue to grow in the upcoming years and reach 82% of all traffic by 2021. If converted to Internet video minutes per second, this equals about one million video minutes per second. Providing and supporting improved compression capability is therefore expected from video processing devices. This will relieve the pressure on storage systems and communication networks while creating preconditions for further development of video services. Transform and quantization is one of the most compute-intensive parts of modern hybrid video coding systems where coding algorithm itself is commonly standardized. High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard which achieves high compression efficiency at the cost of high computational complexity. In this paper we present highly parallel GPU accelerator for HEVC transform and quantization which targets most common heterogeneous computing CPU+GPU system. The accelerator is implemented using CUDA programming model. All the relevant state-of-the-art techniques related to kernel vectorization, shared memory optimization and overlapping data transfers with computation were investigated, customized and carefully combined to obtain a performance efficient solution across all applicable transform sizes. The proposed solution is compared against reference implementation which uses NVIDIA cuBLAS library to perform the same work. Obtained speedup factors for DCI 4K frame are 2.46 times for largest transform size and 130.17 times for smallest transform size what revealed substantial performance gap of this library when targeting GPU of the Kepler architecture. Achieved processing time of frame transform and quantization are up to 4.82 ms. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|