| Popis: |
The paper describes the implementation of a massively parallel cellular architecture specifically designed for a number of tasks related to the physical verification and synthesis of integrated circuits. The machine has been designed to operate as a specialized coprocessor to be attached to a general purpose workstation and is based on a chip set, part designed as full custom components, part as standard cell and part implemented with programmable logic. The first prototype has 256 processing elements, arranged in a 16×16 matrix. |
