Universal Filter Based on Compact CMOS Structure of VDDDA
Autor: | Winai Jaikla, Tomasz Kulej, Fabian Khateb, Koson Pitaksuttayaprot |
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Rok vydání: | 2021 |
Předmět: |
Transconductance
02 engineering and technology lcsh:Chemical technology Biochemistry Article Analytical Chemistry LM13700 0202 electrical engineering electronic engineering information engineering Electronic engineering Hardware_INTEGRATEDCIRCUITS lcsh:TP1-1185 biquad filter Electrical and Electronic Engineering Instrumentation Passband Digital biquad filter Physics VDDDA 020208 electrical & electronic engineering Bandwidth (signal processing) 020206 networking & telecommunications Atomic and Molecular Physics and Optics multiple-input technique CMOS Filter (video) Operational transconductance amplifier operational transconductance amplifier |
Zdroj: | SENSORS. 2021, vol. 21, issue 5, IF: 3,275, p. 1-22. Sensors, Vol 21, Iss 1683, p 1683 (2021) Sensors (Basel, Switzerland) Sensors Volume 21 Issue 5 |
ISSN: | 1424-8220 |
Popis: | This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is −49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter. |
Databáze: | OpenAIRE |
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