A new FPGA accelerator based on circular buffer unit per orientation for a fast and optimised GLCM and Texture feature computation
| Autor: | Rostom Kachouri, Hassene Mnif, Mohamed Amin Ben Atitallah |
|---|---|
| Přispěvatelé: | Laboratoire d'électronique et des technologies de l'Information [Sfax] (LETI), École Nationale d'Ingénieurs de Sfax | National School of Engineers of Sfax (ENIS), Laboratoire d'Informatique Gaspard-Monge (LIGM), Centre National de la Recherche Scientifique (CNRS)-Fédération de Recherche Bézout-ESIEE Paris-École des Ponts ParisTech (ENPC)-Université Paris-Est Marne-la-Vallée (UPEM), Université Paris-Est Marne-la-Vallée (UPEM)-École des Ponts ParisTech (ENPC)-ESIEE Paris-Fédération de Recherche Bézout-Centre National de la Recherche Scientifique (CNRS), Kachouri, Rostom |
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
Optimization
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR] [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR] Execution time Computer science Computation ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION 02 engineering and technology Texture (geology) Haralick's texture feature Computational science Circular buffer unit Vivado_HLS Matrix (mathematics) Circular buffer 0202 electrical engineering electronic engineering information engineering Field-programmable gate array Image analysis applications FPGA Orientation (computer vision) 04 agricultural and veterinary sciences Hardware/Software Implementation Parallel calculation [INFO.INFO-ES] Computer Science [cs]/Embedded Systems 040103 agronomy & agriculture 0401 agriculture forestry and fisheries 020201 artificial intelligence & image processing [INFO.INFO-ES]Computer Science [cs]/Embedded Systems Unit (ring theory) Energy (signal processing) |
| Zdroj: | IEEE international conference on Design & Test of integrated micro & nano-Systems (DTS) IEEE international conference on Design & Test of integrated micro & nano-Systems (DTS), Apr 2019, Gammarth, Tunisia |
| Popis: | International audience; This paper presents an FPGA accelerator based on circular buffer unit per orientation for a fast and optimized Gray Level Co-occurrence Matrix (GLCM) and four Texture features computation. The Four texture features namely, contrast, energy, dissimilarity and correlation are computed using Xilinx FPGA. However, the computation of GLCM and four textures features are very complex and consume a lot of execution time. In this paper, an FPGA accelerator for fast computation of GLCM and four texture features are designed and implemented. This architecture was implemented on a Xilinx Zc-702 using Vivado HLS. The obtained results are then compared against other related works. The synthesis results on FPGA prove a significant gain (about 17%) in execution time compared to the previous work. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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