P4-TPG: Accelerating Deterministic Parallel Test Pattern Generation by Preemptive, Proactive, and Preventive Schedulings
Autor: | Charles C.-H. Hsu, Louis Y.-Z. Lin, Charles H.-P. Wen |
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Jazyk: | angličtina |
Rok vydání: | 2019 |
Předmět: |
General Computer Science
test inflation Computer science General Engineering Preemption Parallel computing Thread (computing) Hardware_PERFORMANCEANDRELIABILITY Pattern generation Reuse Automatic test pattern generation dynamic compaction Scheduling (computing) Parallel ATPG deterministic General Materials Science lcsh:Electrical engineering. Electronics. Nuclear engineering lcsh:TK1-9971 |
Zdroj: | IEEE Access, Vol 7, Pp 6816-6830 (2019) |
ISSN: | 2169-3536 |
Popis: | According to the prior research, a deterministic parallel test pattern generation (TPG) engine was realized and generated the same test pattern set the serial automatic test pattern generation does during acceleration. However, for retaining the determinism, tremendous idle time is observed when different tasks (either dependent or independent) were synchronized among threads. Therefore, a new deterministic parallel TPG engine called P4-TPG is developed and incorporates preemptive, proactive, and preventive schedulings to further save/reuse the idle time during acceleration. In P4-TPG, preemptive scheduling first modifies the thread flow and brings forward, as many latter tasks as possible, to the idle time. Next, proactive scheduling inserts prospective TPG tasks of unprocessed faults to the remaining idle time and increases the overall utilization of threads. Last, preventive scheduling dynamically skips faults incompatible with the working pattern per thread and shortens the fault list during fault compaction. The experimental results show that P4-TPG not only generates the same test pattern set as the serial TPG does but also achieves averagely $10.36\times $ speedups, is 96.6% better than the prior research, using 12 threads on 18 benchmark circuits. |
Databáze: | OpenAIRE |
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