Sigma Delta ADC design using Verilog-A
| Autor: | F. Tinfena, L. Fanucci, F. Mannozzi |
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| Rok vydání: | 2003 |
| Předmět: | |
| Zdroj: | IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Cairo, Egitto, 2003 info:cnr-pdr/source/autori:F. Mannozzi, F. Tinfena, L. Fanucci/congresso_nome:IEEE Midwest Symposium on Circuits and Systems (MWSCAS)/congresso_luogo:Cairo, Egitto/congresso_data:2003/anno:2003/pagina_da:/pagina_a:/intervallo_pagine Università di Pisa-IRIS |
| Popis: | Electrical simulation gives a good evaluation of the performances of sigma-delta modulators but could require too long simulation times. In this paper we introduce the use of Verilog-A, which provides the capability to model the circuit topology of sigma-delta modulators closely to the electrical level and achieving a considerable reduction of simulation time |
| Databáze: | OpenAIRE |
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