Robustness study of a fast protection method based on the gate-charge dedicated for SiC MOSFETs power device

Autor: Yazan Barazi, Nicolas Rouger, Jean-Marc Blaquiere, Frédéric Richardeau
Přispěvatelé: Convertisseurs Statiques (LAPLACE-CS), LAboratoire PLasma et Conversion d'Energie (LAPLACE), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université Fédérale Toulouse Midi-Pyrénées-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées, Richardeau, Frédéric, Centre National de la Recherche Scientifique (CNRS), Institut National Polytechnique (Toulouse) (Toulouse INP)
Jazyk: angličtina
Rok vydání: 2021
Předmět:
Zdroj: Microelectronics Reliability
Microelectronics Reliability, Elsevier, 2021, pp.114246. ⟨10.1016/j.microrel.2021.114246⟩
32th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 2021
32th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 2021, Oct 2021, Bordeaux, France
ISSN: 0026-2714
DOI: 10.1016/j.microrel.2021.114246⟩
Popis: International audience; This paper focuses on the extensive robustness validation of a gate charge detection method designed for SiC MOSFETs under short-circuit operation, and, in terms of failure-modes. The benefits of having a fast (submicrosecond-150ns) detection method is illustrated by a 1D thermo-metallurgical simulation. This method is integrated owing to an optimized SMD/PCB technology (Surface-Mount Device/ Printed Circuit Board).
Databáze: OpenAIRE