A multi-bit/cell PUF using analog breakdown positions in CMOS
| Autor: | B. Kaczer, T. Kallstenius, D. Linten, Kai-Hsin Chuang, Erik Bury, Robin Degraeve, Guido Groeseneken, Ingrid Verbauwhede |
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| Jazyk: | angličtina |
| Předmět: |
010302 applied physics
Hardware security module Bit cell Computer science Physical unclonable function Transistor High density 02 engineering and technology 01 natural sciences Stability (probability) 020202 computer hardware & architecture law.invention Reliability (semiconductor) iMinds CMOS law 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering |
| Zdroj: | 2018 IEEE International Reliability Physics Symposium (IRPS) IRPS |
| DOI: | 10.1109/irps.2018.8353655 |
| Popis: | © 2018 IEEE. A physically unclonable function (PUF) utilizing the analog positioning of breakdown spots in CMOS transistors is presented. In contrast to digital positioning based on a three-transistor cell [3], this new approach has the capability of generating multiple bits from a more compact two-transistor cell. The basic properties and reliability aspects of this PUF are studied based on the test chips fabricated in a commercial 40nm CMOS technology. The breakdown positions in high density arrays have been characterized, proving that indeed multiple bits can be generated from a single nFET. Through consecutive measurements, the long-term stability is found to be reduced, due to shrinking of readout window, especially when more bits are generated. Finally, high temperature also negatively impact the stability, indicating that the analog BD-PUF is a lesser promising candidate for PUF application than the previously presented binarized design. ispartof: pages:PCR.21-PCR.25 ispartof: IEEE International Reliability Physics Symposium 2018 vol:2018-March ispartof: IRPS 2018 location:Burlingame, CA, USA date:11 Mar - 15 Mar 2018 status: published |
| Databáze: | OpenAIRE |
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