2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD)
| Autor: | Giorgos Dimitrakopoulos, Ron Gabor, Dimitris Konstantinou, Ramon Canal, Arkady Bramnik, Yiannakis Sazeides, Chrysostomos Nicopoulos |
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| Přispěvatelé: | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, Universitat Politècnica de Catalunya. VIRTUOS - Virtualisation and Operating Systems |
| Rok vydání: | 2020 |
| Předmět: |
Error detection and correction
Computer science Reliability (computer networking) Serialization Real-time error detection 0211 other engineering and technologies Real-time data processing 02 engineering and technology Fault (power engineering) Memory arrays 0202 electrical engineering electronic engineering information engineering Overhead (computing) Bugs Informàtica::Arquitectura de computadors [Àrees temàtiques de la UPC] 021106 design practice & management Gestió de memòria (Informàtica) Post-silicon validation Reliability 020202 computer hardware & architecture Power (physics) Memory management (Computer science) Temps real (Informàtica) Algorithm Access time |
| Zdroj: | DFT UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) |
| DOI: | 10.1109/dft50435.2020.9250878 |
| Popis: | This work proposes in-situ Real-Time Error Detection (RTD): embedding hardware in a memory array for detecting a fault in the array when it occurs, rather than when it is read. RTD breaks the serialization between data access and error detection and, thus, it can speed-up the access-time of arrays that use in-line error-detection and correction. The approach can also reduce the time needed to root-cause array related bugs during post-silicon validation and product testing. The paper presents how to build RTD into an array with flip-flops to track in real-time the column-parity and introduces a two-dimensional RTD based error-correction scheme. As compared to SECDED, the evaluated scheme has comparable error-detection and correction strength and, depending on the array dimensions, the access time is reduced by 8-24% at an area and power overhead between 12-53% and 21-42% respectively. |
| Databáze: | OpenAIRE |
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