Self-aligned fin cut last patterning scheme for fin arrays of 24nm pitch and beyond
Autor: | Joseph Ervin, Toby Hopf, S. Baudot, A. Soussou, Benjamin Vincent, Pieter Weckx, Steven Demuynck, A. P. Milenin, S. Wang |
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Rok vydání: | 2019 |
Předmět: |
Materials science
Fin business.industry Flow (psychology) Process (computing) 02 engineering and technology Overlay 021001 nanoscience & nanotechnology 01 natural sciences 010309 optics 0103 physical sciences Hardware_INTEGRATEDCIRCUITS Optoelectronics Sensitivity (control systems) Static random-access memory Process simulation 0210 nano-technology business Scaling |
Zdroj: | Advances in Patterning Materials and Processes XXXVI |
DOI: | 10.1117/12.2514927 |
Popis: | In 5 nm FinFET technology and beyond, SRAM cell size reduction to 6 tracks is required with a fin pitch of 24 nm. Fin depopulation is mandatory to enable the area scaling, but it becomes challenging at small pitches. In the first part, each process flow is simulated in order to obtain a 3D model of a FinFET SRAM device. Layout dependent effects on silicon and process non-idealities are characterized in a second part and used to calibrate the 3D model. In the third part, a process sensitivity analysis is conducted to compare the impact of overlay and CD variations on various options. |
Databáze: | OpenAIRE |
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