VLSI implementation of a fairness ATM buffer system

Autor:	L. Dittman, P.S. Lassen, J.V. Nielsen, J.K. Madsen
Rok vydání:	2002
Předmět:	Very-large-scale integration Queueing theory Robustness (computer science) Computer science Distributed computing Asynchronous Transfer Mode Max-min fairness Resource allocation Fair queuing Resource management Weighted fair queueing Scheduling (computing)
Zdroj:	Nielsen, J V, Dittmann, L, Madsen, J K & Lassen, P S 1996, VLSI implementation of a fairness ATM buffer system . in Conference Record of IEEE International Conference on Communications : Converging Technologies for Tomorrow's Applications . vol. Volume 2, IEEE, pp. 681-686, IEEE International Conference on Communications 1996, Dallas, Texas, United States, 23/06/1996 . https://doi.org/10.1109/ICC.1996.541268
Popis:	This paper presents a VLSI implementation of a resource allocation scheme, based on the concept of weighted fair queueing. The design can be used in asynchronous transfer mode (ATM) networks to ensure fairness and robustness. Weighted fair queueing is a scheduling and buffer management scheme that can provide a resource allocation policy and enforcement of this policy. It can be used in networks in order to provide defined allocation policies (fairness) and improve network robustness. The presented design illustrates how the theoretical weighted fair queueing model can be approximated with a model feasible for practical implementation. This approximated model has been implemented as a VLSI component.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::eebdc94fb23f745c98510c4d74155bad https://doi.org/10.1109/icc.1996.541268 Zobrazit plný text záznamu