FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing
| Autor: | Florian Zaruba, Stefan Mach, Fabian Schuiki, Luca Benini |
|---|---|
| Přispěvatelé: | Mach S., Schuiki F., Zaruba F., Benini L. |
| Rok vydání: | 2021 |
| Předmět: |
FOS: Computer and information sciences
Speedup Computer science floating-point unit 02 engineering and technology Hardware Architecture (cs.AR) 0202 electrical engineering electronic engineering information engineering SIMD Electrical and Electronic Engineering multiformat Computer Science - Hardware Architecture Electronic circuit Flexibility (engineering) business.industry transprecision computing Floating-point unit RISC-V Energyefficient 020202 computer hardware & architecture Power (physics) Hardware and Architecture business Software Computer hardware Energy (signal processing) |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 29 (4) |
| ISSN: | 1063-8210 |
| DOI: | 10.1109/tvlsi.2020.3044752 |
| Popis: | The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable precision (a.k.a. transprecision) computing to reduce energy footprint. Hence, we need circuits capable of performing floating-point operations on a wide range of precisions with high energy proportionality. We present FPnew, a highly configurable open-source transprecision floating-point unit (TP-FPU), capable of supporting a wide range of standard and custom FP formats. To demonstrate the flexibility and efficiency of FPnew in general-purpose processor architectures, we extend the RISC-V ISA with operations on half-precision, bfloat16, and an 8-bit FP format, as well as SIMD vectors and multiformat operations. Integrated into a 32-bit RISC-V core, our TP-FPU can speedup the execution of mixed-precision applications by 1.67x with respect to an FP32 baseline, while maintaining end-to-end precision and reducing system energy by 37%. We also integrate FPnew into a 64-bit RISC-V core, supporting five FP formats on scalars or 2, 4, or 8-way SIMD vectors. For this core, we measured the silicon manufactured in Globalfoundries 22FDX technology across a wide voltage range from 0.45 to 1.2 V. The unit achieves leading-edge measured energy efficiencies between 178 Gflop/sW (on FP64) and 2.95 Tflop/sW (on 8-bit mini-floats), and a performance between 3.2 and 25.3 Gflop/s. © 2020 IEEE. ISSN:1063-8210 ISSN:1557-9999 |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|