High-Throughput FPGA-Based Hardware Accelerators for Deflate Compression and Decompression Using High-Level Synthesis
| Autor: | Bruce F. Cockburn, Morgan Ledwon, Jie Han |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
General Computer Science
Computer science 02 engineering and technology Data_CODINGANDINFORMATIONTHEORY lossless compression Huffman coding 01 natural sciences symbols.namesake FPGAbased accelerator High-level synthesis high-level synthesis General Materials Science Field-programmable gate array Throughput (business) hardware accelerator LZ77 compression Lossless compression Virtex business.industry Deflate algorithm 010401 analytical chemistry General Engineering 021001 nanoscience & nanotechnology 0104 chemical sciences DEFLATE symbols lcsh:Electrical engineering. Electronics. Nuclear engineering 0210 nano-technology business lcsh:TK1-9971 Computer hardware |
| Zdroj: | IEEE Access, Vol 8, Pp 62207-62217 (2020) |
| ISSN: | 2169-3536 |
| Popis: | The Deflate compression algorithm provides one of the most widely used solutions for lossless data compression. Field-programmable gate arrays (FPGAs) are commonly used to implement hardware accelerators that speed up computation-intensive applications. In this article, FPGA-based accelerators for Deflate compression and decompression are described. These accelerators were specified in C++ and synthesized using Vivado High-Level Synthesis (HLS) for a Xilinx Virtex UltraScale+ series FPGA and a system clock frequency of 250 MHz. The proposed compressor processes data at a fixed input throughput of 4.0 GB/s and achieves a geometric mean compression ratio of 1.92 on the Calgary corpus benchmark files using static Huffman encoding. While not the first compressor synthesized using high-level synthesis, our design achieves a 25% greater throughput and an 11% greater compression ratio than the only other published design that uses Vivado HLS. The proposed decompressor design achieves average input throughputs of 196.61 MB/s and 97.40 MB/s, for statically and dynamically encoded Calgary corpus files, respectively. This is the first published decompressor design that is synthesized using high-level synthesis and provides performance that is comparable to that of the best published designs, having static throughputs 11% higher and dynamic throughputs only 10% lower than the expertly-optimized design sold by Xilinx. |
| Databáze: | OpenAIRE |
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