A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS
| Autor: | Jae-sun Seo, Deepak Kadetotad, Minkyu Kim, Pooja Saseendran, Naveen Suda, Abinash Mohanty, Luning Wei, Yu Cao, Xiaofei He |
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| Rok vydání: | 2017 |
| Předmět: |
Hardware architecture
business.industry Computer science 020208 electrical & electronic engineering Feature extraction 02 engineering and technology Chip Frame rate Object detection Power (physics) High-definition video Statistical classification CMOS Face (geometry) 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Algorithm design Computer vision Artificial intelligence business |
| Zdroj: | ISCAS ASP-DAC |
| DOI: | 10.1109/iscas.2017.8050798 |
| Popis: | This paper presents an object detection accelerator that features many-scale (17), many-object (up to 50), multi-class (e.g., face, traffic sign), and high accuracy (average precision of 0.79/0.65 for AFW/BTSD datasets). Employing 10 gradient/color channels, integral features are extracted, and the results of 2,000 simple classifiers for rigid boosted templates are adaptively combined to make a strong classification. By jointly optimizing the algorithm and the hardware architecture, the prototype chip implemented in 65nm CMOS demonstrates real-time object detection of 13–35 frames per second with low power consumption of 22–160mW at 0.58–1.0V supply. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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